Monday, March 19, 2012
9:00am–5:00pm |
ISQED 2012 Tutorials Best Practices and Opportunities with Emerging Technologies Room: Sunnyvale
Upholding Moore’s Law by Transistor Innovations Design-assisted Semiconductor Manufacturing 3D Integration with Interposer and TSVs: Requirements for technology infrastructure Interface Architectures for Low Power and High Performance Memory Challenges and Opportunities of 3-D IC System Architecture and Design |
12 Noon–12:50pm |
Lunch Tutorial (Sponsored By Mentor Graphics) Room: Sunnyvale Why Your Extraction Tool Needs to Be Like a Speed Skater at 28nm! |
Tuesday, March 20, 2012
8:15am–10:00am |
Room: Silicon Valley Keynote Speeches: Taming the Challenges in Advanced Node Design Tom Beckley, Senior Vice President, Research and Development, Custom IC and Signoff, Silicon Realization Group, Cadence Design Systems, Inc.
Luigi Capodieci, Director DFM/CAD - R&D Fellow – GLOBALFOUNDRIES
Resistive switching concepts: towards a paradigm change in using non-volatile memories? Christophe Muller, Professor, Aix-Marseille University |
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10:00am-10:20am |
Morning Break |
Exhibits
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10:20am–12 Noon |
Test and Measurement Room: Sunnyvale |
Reliable System Design Room: Morgan Hill |
System Frameworks and Tools Room: Freemont |
Semiconductor Failure Modes and Mitigation for Critical Systems Room: Santa Clara |
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12 Noon–1:30am |
ISQED Luncheon Room: Silicon Valley ISQED Quality Award (IQ Award 2012) ISQED Quality Quest Award (Q2 Award 2012) Best Paper Awards Committee Recognition Awards
Luncheon Speech Applications Driven Analog Technology Development and Innovation Venu Menon, Vice President, Analog Technology Development, Technology and Manufacturing Group, Texas Instruments |
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1:30pm–3:30pm |
Thermal and Power in 3D ICs Room: Sunnyvale |
Low Power Communication Circuits Room: Morgan Hill |
Process-Induced Variability & Hot Spot Detection Room: Freemont |
Power -Aware Testing and Test Strategies for Low Power Devices Room: Santa Clara |
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3:30pm–3:50pm |
Afternoon Break |
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3:50pm–5:30pm |
Emerging Topics in EDA Room: Sunnyvale |
Design & Analysis of Emerging Devices Room: Morgan Hill |
Variation-Aware Design Methodologies Room: Freemont |
Embedded systems’ Virtualization: Concepts, Issues and Challenges Room: Santa Clara |
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5:30pm–7:00pm |
Room: Atrium |
Wednesday, March 21, 2012
8:15am–10:00am |
Room: Silicon Valley Keynote Speeches: Tech and Space: A Symbiotic Relationship Rich Goldman, VP Corporate Marketing & Strategic Alliances, Synopsys
The End of Performance Scaling? Dean M. Tullsen, Professor, University of California, San Diego
10x Power Reduction with 10x More Variability: Does it Make Sense? Jos Huisken, Principal Researcher, IMEC-NL |
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10:00am–10:20am |
Morning Break |
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10:20am–12 Noon |
Physical Design Room: Sunnyvale |
Robust SRAM Design Room: Morgan Hill |
3D Effects on Package Co-Design Room: Freemont |
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12 Noon–1:30pm |
Lunch Break |
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1:30pm–3:30pm |
Advanced Analysis & Characterization for Sub-Micron Design Room: Sunnyvale |
Power-Aware Design Room: Morgan Hill |
Circuit-Level Variability & Manufacturability Room: Freemont |
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3:30pm–3:50pm |
Afternoon Break |
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3:50pm–5:30pm |
Verification & Silicon Debug Room: Sunnyvale |
Challenges & Opprotunities in New Technologies Room: Morgan Hill |
Energy-Aware System Design Room: Freemont |