International Symposium on Quality Electronic Design (ISQED)

Call for Papers

Program at a Glance

CalPT

ISQED 2018 Conference At-a-Glance*

Check out the Technical Papers for ISQED 2018
PDF version of Final Program

Tuesday, March 13, 2018

9:00am–9:45am	Plenary Session 1P Meeting Rooms 209/210 Keynote Speeches:
9:00am–9:45am	Murphy Was an Optimist: Embracing Asymmetry in Electronics Kerry Bernstein - Defense Advanced Research Projects Agency (DARPA)

9:45am-10:00am	Morning Break
10:00am–11:20am	Session 1A Design Verification and Test Meeting Room 201	Session 1B System-level Design and Methodologies (SDM) Meeting Room 206	Session 1C Emerging Logic and Memory Technologies in IoT and Neuromorphic Architectures Meeting Room 207

11:20am–11:50pm	ISQED Luncheon & Panel Sponsored by Synopsys Meeting Rooms 209/210 Best Paper Awards Committee Recognition
11:50am–12:25pm	Luncheon Keynote AI Creating New Opportunities for Chip Designers Dr. Yankin Tanurhan- Vice President Engineering, Synopsys
12:25pm–1:25pm	Luncheon Panel Discussion Role of Machine Learning/AI in Quality Electronic Design
1:25pm-1:35pm	Break
1:35pm–2:35pm	Embedded Tutorial 1 Power-Aware Testing in the Era of IoT Presenter: *Patrick Girard,* LIRMM / CNRS - University of Montpellier / France Meeting Rooms 209/210
2:35pm-3:35pm	Embedded Tutorial 2 Ambient Energy Harvesting Sensor Platform for Internet of Things: From Circuit to System Presenter: *Yongpan Liu,* Professor, Tsinghua University, P.R. China Meeting Rooms 209/210
3:35pm-3:45pm	Afternoon Break
3:45pm–5:25pm	Session 2A Automated Analog and Digital Circuit Optimization Meeting Room 201	Session 2B System-level Design and Methodologies (SDM) Meeting Room 206	Session 2C Poster Briefs *Meeting Room 207*
5:25pm–6:55pm	Poster Papers & Mixer Room: Atrium

Wednesday, March 14, 2018

9:00am–9:45am	Plenary Session 2P Meeting Rooms 209/210 Keynote Speeches:
9:00am–9:45am	Innovation in an Exponential World Nate Brese - Electronics & Imaging - DowDuPont
9:45am-10:00am	Morning Break
10:00am–11:20am	Session 3A Design Verification and Test Meeting Room 201	Session 3B High Performance / Low Power Logic Design Meeting Room 206	Session 3C IoT & Smart Sensors Meeting Room 207
11:20am–11:40am	Morning Break
11:40am–1:00pm	Session 4A Design Technology Co-Optimization (DTCO) Meeting Room 201	Session 4B High Performance / Low Power Logic Design Meeting Room 206	Session 4C IoT & Smart Sensors Meeting Room 207
1:00pm-1:30pm	Lunch Break
1:30pm-2:30pm	Embedded Tutorial 3 Ultra-Low-Power Digital Architectures for the Internet of Things Presenter: *Davide Rossi,* Professor, DEI, University of Bologna Meeting Rooms 209/210
2:30pm-3:30pm	Embedded Tutorial 4 Managing the ever increasing complexity of Cyber-Physical Systems in High-Tech Industry Presenter: *Wouter Leibbrandt,* Research Manager Embedded Systems Innovation, TNO, The Netherlands Meeting Rooms 209/210
3:30pm-3:40pm	Break
3:40pm-5:00pm	Session 5A Energy Efficient Logic Design Using Scaled Technologies Meeting Room 201	Session 5B Hardware Security: PUF, Obfuscation, and Trojan Detection Meeting Room 206	Session 5C Demystifying self-driving cars Meeting Room 207

*This is a preliminary program and is subject to change

ISQED