ISQED 2004

PDF VERSION OF THE PROGRAM


CONFERENCE AT A GLANCE

Date

Time

Monday 3/22/04

9:00am-4:30pm

TUTORIALS

Compact Modeling and Analysis for Nanometer-scale CMOS Design
Room: San Carlos, San Juan

 

6:30pm-8:30pm

 

Evening Panel Discussion EP1 & Dinner
Sponsored by PDF Solutions

DFM PDK’s: Where do they belong?
Are Process Design Kits (PDKs) the answer for modern Design For Manufacturing (DFM) issues?

Room: Donner Pass

Tuesday 3/23/04

8:30am-10:15pm

PLENARY SESSION 1P

Sponsored by Synopsys

Keynote Speeches by:

John Chilton, Marc Levitt, SY Wang

Room: Donner Pass

10:15am-10:30am

Morning Break

10:30am-12:00pm

Session 1A

Physical Design Migration

Room: San Carlos

Session 1B

CMOS device and memory

Room: San Juan

Session 1C

Poster Papers

 

 

Room: City Foyer

 

12:00pm-1:00pm

ISQED LUNCHEON AWARDS & SPEECH

Committee Promotion Awards

Best Paper Awards
Sponsored by Synopsys

Followed by
Luncheon Speech:

The IP Quality Revolution
Michael Keating

Room: Donner Pass

1:00pm-3:05pm

Session 2A

Topics in printability

Room: San Carlos

Session 2B

Package design and interaction

Room: San Juan

Session 2C

Test generation and application

 

Room: San Martin

 

3:05pm-3:30pm

Afternoon Break
Sponsored by Magma Design

3:30pm-5:30pm

Session 3A

Modeling and simulations of electromigration and eletromagnetic effects

Room: San Carlos

Session 3B

Interconnect: Capacitance extraction and delay calculation

Room: San Juan

Session 3C

Substrate noise: Analysis and prevention

 

Room: San Martin

 

 

6:30pm-8:30pm

Evening Panel Discussion EP2
Sponsored by Ascend

IP Industry: Nordstrom or K-Mart?
The trend toward tighter relationships between supplier and user

Room: Donner Pass

Wednesday 3/24/04

8:30am-10:15am

PLENARY SESSION 2P

Sponsored by Magma

Keynote speeches by:

Hiroto Yasuura, Pierre Paulin, Krishna Saraswat

Room: Donner Pass

10:15am-10:30am

Morning Break

10:30am-12:00pm

SESSION 4A

Interconnect delay and coupling

 

Room: San Carlos

SESSION 4B

Analysis of variations

 

Room: San Juan

SESSION 4C

Layout and design techniques for quality and reliability

Room: San Martin

 

12:00pm-1:00pm

LUNCH BREAK

1:00pm-3:05pm

SESSION 5A

Analog Testing

 

 

Room: San Carlos

SESSION 5B

Low power design

 

 

Room: San Juan

SESSION 5C

Layout and design techniques for quality and reliability

Room: San Martin

3:05pm-3:30pm

 Afternoon Break

3:30pm-5:30pm

SESSION 6A

DFM Design Techniques


Room: San Carlos

SESSION 6B

Delay test issues


Room: San Juan

SESSION 6B

Circuit design trends in DSM

 

 

 

Room: San Martin

 


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International Symposium on Quality of Electronic Design
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Revised: January 21, 2005