Machine Learning for Evaluating the Impact of Manufacturing Process Variations in High-Speed Interconnects

Cemil Geyik1, Zhichao Zhang1, Kemal Aygun1, James Aberle2
1Intel Corporation, 2Arizona State University


Abstract

This paper presents a machine learning based modeling methodology to analyze the impact of high-volume manufacturing process variations on electrical performance of high-speed interconnects, that overcomes the limitations of traditional approaches. The proposed methodology outperforms the response surface based modeling for high-speed interconnects and is capable of handling highly nonlinear relationships. Machine learning is demonstrated to be a promising approach to explore design spaces efficiently and accurately even when modeling data is limited due to expensive computational cost.