Chaotic circuits have found application in various research areas, including cryptography. However, more effort has to be made to achieve the properties required for such circuits when it comes to their circuit design. We identify and optimize for regions of chaos in a simple three-transistor system known as a chaogate. We use simulations to study the dynamical behavior of the system treated as a one-dimensional map, and then maximize its chaotic and cryptographic behavior using artificial intelligence. We propose several useful metrics for the chaogate, such as the maximum Lyapunov exponent, and measure these metrics over the transistor parameter space. Finally, we apply Bayesian optimization and Genetic Algorithm to identify various chaogate designs in different technology nodes, which we visualize, compare, and use to propose future research.