RARA: Dataflow Based Error Compensation Methods with Runtime Accuracy-Reconfigurable Adder

Shujuan Yin1, Zheyu Liu2, Guihong Li3, Fei Qiao2, Qi Wei4, Yuanfeng Wu5, Lianru Gao5, Xinjun Liu6, Huazhong Yang2
1Baotou Teachers' College, Inner Mongolia University of Science & Technology, Baotou, China;Tsinghua University, Beijing, China, 2Tsinghua University, Beijing, China;Beijing National Research Center for Information Science and Technology, 3University of Texas at Austin;Tsinghua University, Beijing, China, 4Tsinghua University, Beijing, China, 5Key Laboratory of Digital Earth Science, Aerospace Information Research Institute, Chinese Academy of Sciences, Beijing, China;, 6Tsinghua University, Beijing, China;

Abstract

The promulgation of Internet-of-Things technologies requires higher energy efficiency than the past. Approximate computing is a promising computation paradigm in the post-Moore era. It seeks a subtle balance between computation accuracy and many other metrics, especially the power consumption. Thereinto, approximate adders are important because addition is the essential operation in most applications. In this article, we propose a runtime accuracy reconfigurable adder with the accurate mode and 16 approximate modes with different accuracy. The statistical error model of the adder is built on two typical dataflow graphs: the adder chain and adder tree. Then, we introduce two methods to compensate for the accuracy loss based on the error model: Input Gating and Dataflow Reorganization. Our proposed adder achieves higher configuration flexibility with much less area overhead. The experiment results show our methods can make average output error reduce up to 61% without energy cost.