Preliminary Program

An Efficient Timing Analysis Model for 6T FinFET SRAM using Current-Based Method

Tiansong Cui¹, Ji Li¹, Alireza Shafaei Bejestan¹, Shahin Nazarian¹, Massoud Pedram²
¹University of Southern California, ²USC

Abstract

This paper presents an efficient Current Source Model (CSM) to calculate the read/write delay of FinFET 6T SRAM cells accounting for noisy waveform at each voltage node.