Through-silicon-via (TSV) based three dimensional (3D) integration has evolved as a great area in integrated-circuit (IC) technology. TSV defects may happen due to manufacturing problem 3D IC and the chip is discarded for a single TSV defect. Allocation of redundant TSVs to the faulty TSVs is an attractive solution to recover from TSV defects. Proper grouping of functional and redundant TSVs can enhance the recovery of faulty TSVs. In this paper we have addressed a heuristic approach to find the best possible grouping of functional and redundant TSVs such that the wire length for rerouting redundant TSV is minimized.