This paper presents a radiation-hardened-by-design (RHBD) phase-locked loop (PLL) which utilizes a feedback voltage controlled oscillator (FBVCO) to mitigate a single event transient (SET) strike. Whenever the SET pulse attacks the input control voltage of VCO, VCO gives rise to a frequency disturbance and PLL produces a huge jitter at the output clock. The proposed FBVCO consists of an open loop VCO, an integrator and a switched-capacitor resistor. The input transfer function of the FBVCO has a low pass characteristic so that the FBVCO can reduce any perturbation at the input control voltage. In addition, the proposed RHBD PLL reduces size by using one loop filter (LF) and charge pump (CP) compared to prior works. We simulate the proposed scheme in 130 nm low power CMOS technology at 1.5V supply. The output frequency variation of the proposed PLL from the SET strike is 75% smaller than that of previous PLL at 300 MHz. This RHBD PLL consumes 6.2 mW at 400 MHz output frequency.