In order to build an extremely high performance and real-time systems, every building block in the system should be built to achieve its best performance. CMOS technology scaling makes CMOS not always the best choice for build- ing this kind of systems. Some other technologies like BJT and BICMOS show better capabilities in building some ba- sic analog blocks like input buffers and power ampliļ¬ers. As a result, using the best appropriate technology for each basic building block may force us to use SIP integration us- ing bonding wires instead of the on-chip integration. In this paper we suggest using 3D stacking to integrate the het- erogeneous building blocks. In order to evaluate the sys- tem, we modeled the bonding wire and the TSV interfaces. While most of the previous evaluations for TSV focused on its ability to transfer digital signals, in this paper we used the developed models to study the behavior of the analog signals going through the bonding wires and the TSV and measure its role in enhancing or limiting the performance of the heterogeneous basic blocks. The evaluation shows non-negligible improvements in the system capabilities in terms of power, bandwidth, and signal integrity when 3D integration is used