Session 2A

San Carlos Room

1:00pm - 3:05pm

Test Application and Cost Reduction

Chairs:    Sreejit Chakravarty, Intel

David Bonyuet, Delta Search Labs

1:00pm

Introduction

1:05pm

2A.1        Reseeding-Based Test Set Embedding With Reduced Test Sequences

E. Kalligeros, D. Kaseridis, X. Kavousianos, D. Nikolos, University of Patras, Greece

1:35pm

2A.2        Reduced Test Application Time Based On Reachability Analysis

Th. Haniotakis, S. Tragoudas, G. Pani, ECE Dept., Southern Illinois University

2:05pm

2A.3        Using MUXs Network to Hide Bunches of Scan Chains

Yinhe Han*, Yu Hu* *, Huawei Li* *, Xiaowei Li*, *Institute of Computing Technology, Chinese Academy of Sciences, Beijing,

 **Graduate School of Chinese Academy of Sciences, Beijing

2:35pm

2A.4        BIST-Guided ATPG

Ahmad A. Al-Yamani, Edward J. McCluskey, Stanford University  

3:05pm

2A.5   Dynamic Test Compaction for Bridging Faults 

Irith Pomeranz, Sudhakar M. Reddy, Purdue University